Supply original CDC351DBR, Clock/Timing - Clock Buffers, Drivers, by Texas Instruments

Description
The U634H256 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled.
The U634H256 is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell.
The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation) take place automatically upon power down using charge stored in an external 100 µF capacitor.
Features ❐ High-performance CMOS non volatile static RAM 32768 x 8 bits ❐ 25, 35 and 45 ns Access Times ❐ 10, 15 and 20 ns Output Enable Access Times ❐ ICC = 15 mA typ. at 200 ns Cycle Time ❐ Automatic STORE to EEPROM on Power Down using external capacitor ❐ Hardware or Software initiated STORE (STORE Cycle Time < 10 ms) ❐ Automatic STORE Timing ❐ 105 STORE cycles to EEPROM ❐ 10 years data retention in EEPROM ❐ Automatic RECALL on Power Up ❐ Software RECALL Initiation (RECALL Cycle Time < 20 µs) ❐ Unlimited RECALL cycles from EEPROM ❐ Single 5 V ± 10 % Operation ❐ Operating temperature ranges: 0 to 70 °C -40 to 85 °C -40/-55 to 125 °C (only 35 ns) ❐ QS 9000 Quality Standard ❐ ESD protection > 2000 V (MIL STD 883C M3015.7-HBM) ❐ Packages: SOP32 (300 mil), PDIP32 (600 mil, only C/K-Type)